1. Field of the Invention
The present invention relates to crystal oscillator circuits for generating high-frequency signals, and more particularly to a high-frequency monolithic third-overtone crystal oscillator circuit with inherent fundamental frequency suppression.
2. Description of the Prior Art
U.S. Pat. No. 4,600,899, issued Jul. 15, 1986 to Kennedy, entitled DUAL MODE CRYSTAL PHASE SHIFT TRANSISTOR OSCILLATOR, discloses an oscillator that comprises an amplifier with a feedback loop from the output to the input thereof, the feedback loop including a resonator such as a crystal providing oscillation of the amplifier at a predetermined frequency. A balanced modulator coupled to the amplifier generates a voltage varying at the same frequency, said voltage being selectably variable in amplitude from zero upward either in phase with the amplifier or 180 degrees out of phase therewith. The voltage is selectably inserted into the feedback loop 90 degrees out of phase with the output of the amplifier, whereby, when it is inserted, the frequency of oscillation of the amplifier varies from the predetermined frequency in direction depending upon the phase relationship of the amplifier and voltage and in amount upon the amplitude of the voltage.
The patent describes how to make a voltage-controlled oscillator from a crystal-controlled oscillator. There is no mention of whether the crystal oscillator can be used in third-overtone applications. It is restricted to the crystal oscillators in the fundamental mode and its innovative part is that it can also be used as a voltage-controlled oscillator by means of additional circuitry.
U.S. Pat. No. 3,054,967, issued Sep. 18, 1962 to Gindi, entitled FREE-RUNNING PULSE GENERATOR FOR PRODUCING STEEP EDGE OUTPUT PULSES, discloses pulse generators which employ transistors for developing substantially rectangular output pulses at a preselected repetition rate and which have steep edge portions for precise timing purposes at frequencies above one megacycle. This patent uses inductors and transformer to select the right frequency of operation. One of the essential features of the applicant's invention is the avoidance of such inductive components for the frequency selection.
U.S. Pat. No. 4,297,654, issued Oct. 27, 1981 to Goerth, entitled CRYSTAL OSCILLATOR INCLUDING A MOS-CAPACITOR, discloses a semiconductor element having a MOS-capacitor between a zone provided in an epitaxial layer on a substrate and a conductive layer on an insulating layer above the zone is utilized in a structure comprising a tunable oscillator having a differential amplifier, a current distributor controlled by a control voltage, a phase shifting element comprising the MOS-capacitor and a feedback path present between the phase shifting element and an input of the differential amplifier. The feedback path comprises a quartz oscillator and an emitter-follower transistor. The stray capacitor between the zone and a substrate of the opposite conductivity type is considerably reduced by a further zone of the opposite conductivity type which is applied to a fixed potential through a connection electrode. This connection point is for the supply voltage of the circuit, while the further zone of the first conductivity type is connected parallel to the emitter-base current path of the emitter-follower transistor.
This patent describes how to reduce the parasitic effects on an on-chip MOS-capacitor which can be used in integrated circuits such as any oscillator circuit in monolithic form. It is more related to the semiconductor device physics and integration rather than to the field of crystal oscillator circuit design.
U.S. Pat. No. 2,796,522, issued Jun. 18, 1957 To Greenspan et al, entitled CRYSTAL-CONTROLLED RELAXATION OSCILLATOR, relates to relaxation oscillators and in particular to a method and apparatus for stabilizing the frequency of relaxation oscillators by means of a piezoelectric crystal. The oscillator includes a multivibrator, the output frequency of which is synchronized with a harmonic or subharmonic of a piezoelectric crystal. The piezoelectric crystal is coupled into the grid circuit of the multivibrator, the crystal and tube acting as a crystal oscillator immediately prior to the firing of the tube in whose grade circuit the crystal is coupled. In addition to the crystal oscillator, the circuit resonates as a low-Q amplitude-unstable oscillator, whose frequency is locked on some harmonic or subharmonic of the crystal frequency. Because the low-Q oscillator is amplitude unstable, successive oscillations of this circuit will produce output voltages of increasing amplitude, the firing of the tubes of the multivibrator being controlled by one of these voltage peaks. Since the amplitude of these peaks is increasing rapidly, particularly during the prior just before firing, the circuit can easily differentiate between successive voltage peaks. This patent describes a relaxation oscillator which can be made more stable in frequency by addition of a crystal. A relaxation oscillator is a low-Q regenerative circuit whose behavior is entirely different from a crystal oscillator which has extremely high-Q. It is an attempt to improve the poor stability of relaxation oscillators.
U.S. Pat. No. 4,864,256, issued Sep. 5, 1989 to Barnert, entitled OSCILLATOR WITH REDUCED HARMONICS, discloses an oscillator for producing an oscillating signal with reduced harmonics including an oscillator stage coupled to an output stage having a relatively fast switching speed yet producing an oscillating signal having relatively slow rise and fall times so that the harmonics output by the oscillator are reduced. In one embodiment, the oscillator includes an output stage having low power Schottky circuitry, and in a second embodiment, the output stage includes a capacitor connected across the output stage of the oscillator to increase the rise and fall times of the oscillator. The patent addresses the problem of how to reduce the unwanted harmonics produced by the sharp (fast) transitions of the oscillator input. Therefore, the design is mainly concerned with the output buffer stage (not the oscillator itself) which serves as a means of slowing down the oscillator output transitions.
U.S. Pat. No. 4,710,731, issued Dec. 1, 1987 to Sugita et al, entitled PLANAR TYPE THICKNESS SHEAR MODE QUARTZ OSCILLATOR, describes a planar type thickness shear mode quartz resonator which can be operated by an oscillation circuit free of any coils or condensers in the tuning circuit and in which the ratio between the diameter and the thickness of the resonator is so designed as to yield stable oscillation in the third-overtone. The difference between the negative resistance of the oscillation circuit and the crystal impedance of the quartz resonator is greater in the third-overtone than the difference in other oscillation modes.
The circuit shown in this patent does not include a feedback resistor for overtone selection because the whole point of this patent is the design of a special crystal device (not a crystal oscillator) which has a strong third-overtone response (in other words, the crystal loss in the third-overtone mode is hopefully less than the negative resistance provided by the oscillator circuit to which it is connected). The patent tries to achieve this by careful design of the thickness and the diameter of the crystal device. This approach is going to fail if the oscillator circuit itself is not designed properly to provide enough negative resistance.
U.S. Pat. No. 4,039,973, issued Aug. 2, 1977 to Yamashiro, entitled INITIATION CIRCUIT IN A CRYSTAL-CONTROLLED OSCILLATOR, discloses that in a crystal-controlled oscillator circuit comprising a complementary-MOS inverter provided with a crystal in the feedback circuit, an initiation circuit is provided which comprises another complementary-MOS inverter connected in parallel to said MOS inverter only at the time of initiation. This oscillator circuit includes a parallel circuit connection of two complementary-MOS inverters at the time of initiation and hence has a large driving power and a short oscillation initiation time. Because of rendering one complementary-MOS inverter to be cut off at a time of normal oscillation, the power consumption is reduced.
This patent is restricted to a crystal-oscillator start-up (initiation) circuit. The innovation in this patent is the MOS inverter which provides the desired speed-up during the oscillator initiation (start-up) which may otherwise take long in CMOS (complementary-MOS) crystal oscillator implementations.
U.S. Pat. No. 3,699,476, issued Oct. 17, 1972 to Mancini, entitled CRYSTAL CONTROLLED DIGITAL LOGIC GATE OSCILLATOR, discloses a high frequency crystal-controlled oscillator circuit which utilizes a digital logic gate in an amplifier mode of operation and produces sine or square wave output signals.
This patent essentially describes a conventional Pierce oscillator. A resistor and an inductor are added in series to suppress the spurious oscillations and to enable the coupling of the logic gates with the crystal which is the innovation in this patent.